1. Field of the Invention
The present invention relates to a MOSFET for an input/output protective circuit. More specifically, the present invention relates to a structure of a MOSFET in which a level of electrostatic resistance is increased.
2. Description of the Related Art
In a semiconductor integrated circuit, when an overvoltage is applied to an input/output terminal, a protective circuit is disposed in the input/output terminal so that an internal circuit may not be broken. Many protective circuits include a protective MOSFET. The protective circuit in which the protective MOSFET is used will be described below.
FIG. 1(a) shows an example that the protective MOSFET is used for protecting an input. A drain electrode is connected to an input terminal directly or through a resistance r. A gate electrode and a source electrode are commonly connected to a ground power source. Typically, this NMOSFET is in a state of a discontinuity, since a gate potential is fixed at a ground level. A signal applied to the input terminal is supplied to the internal circuit as it is. When the overvoltage such as an electrostatic pulse is applied to the input terminal, a parasitic NPN bipolar transistor which is formed by a drain-substrate-source of the protective NMOSFET is conducted. The parasitic NPN bipolar transistor is operated so that the overvoltage may not be supplied to the internal circuit.
FIG. 1(b) shows an example that the protective MOSFET is used for protecting an output. The drain electrode is connected to the input terminal. The source electrode is connected to the ground power source. An output signal of the internal circuit is supplied to the gate electrode. This NMOSFET combines an output transistor and a protective transistor. When the overvoltage is applied to an output terminal, the NMOSFET is in a state of a continuity. A charge is emitted to a ground terminal.
FIG. 1(c) shows an example that a CMOS circuit is used as the output transistor. Like the circuit shown in FIG. 1(b), when the overvoltage is applied to the output terminal, the NMOSFET is conducted, and thus this circuit functions as the protective transistor.
An exemplary structure of the above-described protective NMOSFET will be described with reference to FIGS. 2 and 3.
Herein, an exemplary input protective N-type MOSFET is described in which the gate potential is fixed at the ground level. In FIG. 2, a polysilicon wire (701) is connected to an external terminal. The polysilicon wire (701) is connected to a drain diffusion layer (707) of the protective MOSFET by an embedded contact hole (704). Furthermore, a metal wire 2 (703) is a wire for transmitting the signal to the internal circuit to be protected.
Typically, since the gate potential is fixed at the ground level, this NMOSFET is not conducted and is not operated. Accordingly, the signal from the external terminal is input from the polysilicon wire through the drain diffusion layer (707) of the MOSFET via the metal wire 2 to the internal circuit. When the overvoltage such as the electrostatic pulse is applied to the external terminal, the parasitic NPN bipolar transistor which is formed by the drain (707)-substrate (820)-source (708) of the protective NMOSFET is conducted. A voltage between the external terminal and a ground is clamped, which prevents the overvoltage from being applied to the internal circuit.
During a parasitic bipolar operation, a high electric field is generated near a junction of the drain diffusion layer of the NMOSFET. A high current flows, and thus a temperature is increased. If an embedded contact is not used, the metal wire is connected directly to the drain diffusion layer. Therefore, a heat causes the metal wire at a contact portion to be melted. The melted metal wire reacts with a silicon substrate. A metal wire 1 and the substrate are short-circuited. The embedded contact is used for a reason that the metal wire is spaced from the drain diffusion layer so as to prevent the metal wire from easily melting, which allows a level of electrostatic resistance to be improved.
In a conventional semiconductor device as shown in FIGS. 2 and 3, one embedded contact hole (704) alone is disposed between the polysilicon wire (701) and the drain diffusion layer (707). In addition, the embedded contact hole (704) is located at an end of the drain diffusion layer (707). Thus, the following problem occurs.
A process in which the MOSFET is operated as the described-above parasitic NPN bipolar transistor is accomplished in the following manner according to an investigation by the inventors.
In the first place, a surge voltage applied to the external terminal is transmitted from the polysilicon wire (701) to the drain diffusion layer (707). A breakdown occurs at any one point where the surge voltage comes in contact with the drain diffusion layer and a gate electrode (706).
In general, the breakdown occurs at the end of a field LOCOS which has the lowest junction pressure resistance, for example, at a portion shown by X in FIG. 2. Thenceforth, with a substrate current generated by the breakdown, the parasitic bipolar operation is performed. Initially, the operation is started near a point X. The operation is subsequently transmitted in a direction W of a MOS transistor and is spread. For example, when the MOS transistor has W=50 .mu.m, it is appreciated that it takes 20-40 nsec until the parasitic bipolar operation is performed all over the entire W.
Accordingly, in a very initial step of the parasitic bipolar operation, the current is restrained to some extent. A current density is restrained at the point where the breakdown occurs. After the current is thoroughly spread, the inventor of the present invention found that a connecting method is preferable which allows a current distribution to be uniform.
In this point of view, in the structure shown in FIG. 2, a stress is increased at the point X. Therefore, a junction deterioration causes a generation of a leakage current. In many cases, a gate insulating film is broken.